From 789e72ba555e23d824f3f886a06ea76e0768d1c4 Mon Sep 17 00:00:00 2001
From: JJ Bliss <jj@infinity.garden>
Date: Wed, 6 May 2026 16:54:11 -0400
Subject: [PATCH] improved expansion bus cpyr handling

---
 uxn/uxn.ha | 38 +++++++++++++++++++++++---------------
 1 file changed, 23 insertions(+), 15 deletions(-)

diff --git a/uxn/uxn.ha b/uxn/uxn.ha
index ee08d5d..a7df515 100644
--- a/uxn/uxn.ha
+++ b/uxn/uxn.ha
@@ -172,6 +172,11 @@ export fn emu_deo(port: u8, value: u8, state: *uxn) void = {
 	// fmt::printfln("Writing {:x} to port {:x}", value, port)!;
 	state.dev[port] = value;
 	switch(port) {
+	case 0x03 =>
+		const high = state.dev[0x02];
+		const low = value;
+		const eaddr = short_from_bytes(high,low);
+		deo_expansion(eaddr,state);
 	case 0x04 =>
 		state.ptr[0] = value;
 	case 0x05 =>
@@ -179,8 +184,8 @@ export fn emu_deo(port: u8, value: u8, state: *uxn) void = {
 	case 0x0e =>
 		print_stack_debug(state);
 	case 0x11 =>
-		let high = state.dev[0x10];
-		let low = value;
+		const high = state.dev[0x10];
+		const low = value;
 		state.console_vector = short_from_bytes(high,low);
 		// fmt::printfln("Setting console_vector to: {:x}", console_vector)!;
 	case 0x18 =>
@@ -246,29 +251,32 @@ fn deo_expansion(addr: u16, state: *uxn) void = {
 	const length = short_from_bytes(state.ram[addr+1],state.ram[addr+2]);
 	switch(op) {
 		case 0x00 => //fill
-			const bank = short_from_bytes(state.ram[addr+3],state.ram[addr+4]);
-			const addr = short_from_bytes(state.ram[addr+5],state.ram[addr+6]);
+			const bank = short_from_bytes(state.ram[addr+3],state.ram[addr+4]): u32;
+			const addr = short_from_bytes(state.ram[addr+5],state.ram[addr+6]): u32;
 			const value = state.ram[addr+7];
+			fmt::printfln("expansion fill: bank: {:x} addr: {:x} value: {:x} | length: {:x}",bank,addr,value,length)!;
 			if(bank < numbanks) for(let i: u16 =0; i < length; i+=1){
 				state.ram[bank * banksize + addr + i] = value;	
 			};
 		case 0x01 => //cpyl
-			const srcbank = short_from_bytes(state.ram[addr+3],state.ram[addr+4]);
-			const srcaddr = short_from_bytes(state.ram[addr+5],state.ram[addr+6]);
-			const dstbank = short_from_bytes(state.ram[addr+7],state.ram[addr+8]);
-			const dstaddr = short_from_bytes(state.ram[addr+9],state.ram[addr+10]);
+			const srcbank = short_from_bytes(state.ram[addr+3],state.ram[addr+4]): u32;
+			const srcaddr = short_from_bytes(state.ram[addr+5],state.ram[addr+6]): u32;
+			const dstbank = short_from_bytes(state.ram[addr+7],state.ram[addr+8]): u32;
+			const dstaddr = short_from_bytes(state.ram[addr+9],state.ram[addr+10]): u32;
+			fmt::printfln("Cpyl: src: {:x} <-> {:x}  dst: {:x} <-> {:x} | length: {:x}",srcbank,srcaddr,dstbank,dstaddr,length)!;
 			if(srcbank < numbanks && dstbank < numbanks) for(let i: u16 =0; i < length; i+=1){
 				const readval = state.ram[srcbank * banksize + srcaddr + i];
 				state.ram[dstbank * banksize + dstaddr + i] = readval;	
 			};
 		case 0x02 => //cpr  TODO are these actually different??  Either way need to not use for loop
-			const srcbank = short_from_bytes(state.ram[addr+3],state.ram[addr+4]);
-			const srcaddr = short_from_bytes(state.ram[addr+5],state.ram[addr+6]);
-			const dstbank = short_from_bytes(state.ram[addr+7],state.ram[addr+8]);
-			const dstaddr = short_from_bytes(state.ram[addr+9],state.ram[addr+10]);
-			if(srcbank < numbanks && dstbank < numbanks) for(let i: u16 =0; i < length; i+=1){
-				const readval = state.ram[srcbank * banksize + srcaddr + i];
-				state.ram[dstbank * banksize + dstaddr + i] = readval;
+			const srcbank = short_from_bytes(state.ram[addr+3],state.ram[addr+4]): u32;
+			const srcaddr = short_from_bytes(state.ram[addr+5],state.ram[addr+6]): u32;
+			const dstbank = short_from_bytes(state.ram[addr+7],state.ram[addr+8]): u32;
+			const dstaddr = short_from_bytes(state.ram[addr+9],state.ram[addr+10]): u32;
+			fmt::printfln("Cpyr: src: {:x} <-> {:x}  dst: {:x} <-> {:x} | length: {:x}",srcbank,srcaddr,dstbank,dstaddr,length)!;
+			if(srcbank < numbanks && dstbank < numbanks) for(let i: u16 =1; i <= length; i+=1){
+				const readval = state.ram[srcbank * banksize + srcaddr + length - i];
+				state.ram[dstbank * banksize + dstaddr + length - i] = readval;
 			};
 		case =>
 			fmt::fatalf("Unknown expansion op: 0x{:x}",op);